1. Field of the Invention
The present invention relates to a voltage detection circuit that detects a change in voltage such as a supply voltage.
2. Description of the Related Art
Up to now, in order to detect a state in which a supply voltage that is applied in a semiconductor integrated circuit drops and circuit operation becomes unstable, there has been used a voltage detection circuit configured as shown in FIG. 9 (for example, refer to JP 2003-115753 A).
A bias circuit 209 is made up of a p-channel MOS transistor 208 and an n-channel depletion MOS transistor 207 whose gates are grounded, and which are connected in series between the supply voltage and a ground point. The n-channel depletion MOS transistor 207 operates as a constant current element.
A current mirror circuit is made up of p-channel MOS transistors 201 and 202 whose gates are commonly connected to each other. The drain of the MOS transistor 201 is connected with an n-channel depletion MOS transistor 203 as a constant current element, and the drain of the MOS transistor 202 functions as an output terminal.
The drain of the MOS transistor 202 is connected with the drain of an n-channel MOS transistor 204 having a gate connected to the drain of the MOS transistor 208 and a source grounded.
Also, the drain of the MOS transistor 202 is connected with a CMOS inverter, including a p-channel MOS transistor 205 and an n-channel MOS transistor 206, as an amplifying circuit.
Then, as shown in FIGS. 10A and 10B, when the supply voltage exceeds a given voltage, N2 becomes an “H” level (FIG. 10A), a voltage that is applied to the gate of the CMOS inverter changes from the “H” level (supply voltage) to an “L” level (ground potential) (FIG. 10B), and the above voltage detection circuit outputs a signal of the “H” level.
The above circuit outputs a signal of the “L” level when the detected supply voltage is equal to or lower than a predetermined voltage, and outputs a signal of the “H” level when the detected supply voltage exceeds the predetermined voltage.
However, in the voltage detection circuit disclosed in JP 2003-115753 A, there are many cases in which the aspect ratio (W/L) of the depletion MOS transistor 203 is reduced from the viewpoint of the necessity of power saving to reduce a current value that is always consumed. Also, since the MOS transistors 205 and 206 at the output stage are frequently large in gate area, the gate capacities become larger.
For that reason, in the above conventional example, it takes time to charge or discharge electric charges with respect to the gate capacity and the parasitic capacity, and therefore there arises such a problem that it takes time for N3 to change the state from the “H” level to the “L” level, or to change the state from the “L” level to the “H” level.